We are introducing a unique, patented approach to achieve smooth, low defect density SiC substrate surfaces. The Plasma Polishing technique has been proven to achieve sub-nm surface smoothness and enabled low defect density Epitaxial growth on 150mm SiC wafers.
The SiC substrate surface quality is the starting point affecting the quality of epi, device performance, reliability and lifetime. Achieving an optimal surface is difficult due to the hardness of SiC and the methods used to slice and thin the wafers from the starting boule introduce damage on the surface. Removal of this damage is vital to enable yield and performance down the manufacturing line.
Plasma etching is a standard processing technique within front end processing for semiconductor high volume manufacturing capable of etching materials from diamond to titanium giving smooth, defect free surfaces. Plasma Polishing maintains the material quality and provides better control of the silicon carbide surfaces.REQUEST MORE INFO
Plasma Polishing technique enables you to:
SiC wafers are moving to 150mm now and 200mm in the near future. The increased wafer size means single wafer processing is now preferable to batch processing. This allows industry standard methods of wafer handling, monitoring and control to be applied reducing touchtime, increasing yield and efficiency. The trend within front end processing is for dry, plasma processing to displace wet processes as plasma processing achieves higher repeatability, greater process control and systems more suitable to the fab cleanroom environment.
Wafer grinding and CMP requires smaller and smaller grit size to improve the surface quality, the particles leave scratches on the surface as it scrapes the SiC. Plasma processing uses ionised gas to remove the SiC actively, the ions and molecules are the smallest possible removal medium.
Plasma Polishing replaces the CMP method in SiC process line.
*Orange processes show solutions covered by Oxford Instruments Plasma Technology.
Plasma polishing reduces the materials usage costs, running costs and approaches zero wafer breakage levels.
CMP costs are dominated by the cost of the slurry, water and the abrasive pads which require regular replacement. Fab costs for CMP are high with large amounts of water required during substrate processing. Wafer loss through breakage is high with the mechanical strain of the CMP process.
Clean water is recognised as becoming valuable and scarcer on a global scale, it is one of the key environmental issues of our lifetimes.
Plasma processing is standard within semiconductor HVM fabs with well established and controlled methods for handling of exhaust gases to strict environmental standards. The water used for plasma processing is the fab recirculation supply which is constantly recycled and re-used.
CMP requires large amounts of water to dilute and dispose of the slurry and toxic chemical effluent resulting from the process, a large cost and complexity when running large HVM cleanroom facilities.
Plasma etching has been proven to provide the high quality substrate finish needed to minimise epi defects and maximise SiC device performance. We have developed an innovative cassette to cassette plasma process solutions which provide the best SiC substrate surface quality.
Send us your sample and we can process your wafers at our advanced applications facility in the UK.